1. Field of the Invention
The present invention relates to a power output circuit and a related control method, and more particularly, to a control method capable of adjusting an operating frequency of a charge pump in a power output circuit.
2. Description of the Prior Art
A charge pump, which is a common power supply circuit, may generate and output a voltage value higher than its input voltage. The voltage outputted by a charge pump may be of any magnification. For example, the input voltage may be multiplied by 2 or 3 and then outputted. If the charge pump is connected to a voltage regulator via a feedback circuit, the reference voltage in the voltage regulator may be used to realize a predetermined and stable output voltage.
In order to provide a higher output voltage, the charge pump may include capacitors for storing electric charges, and switching of a clock signal is applied to generate a higher voltage. Conventionally, a charge pump uses an external capacitor (i.e., a capacitor outside the chip) to store electric charges. The external capacitor has a larger capacitance and is capable of storing more electric charges; hence, a clock with a lower frequency is enough for providing a stable output voltage. In recent years, the external capacitor is gradually replaced by a built-in capacitor (i.e., a capacitor inside the chip) in order to reduce costs and minimize circuit areas. However, the built-in capacitor has a smaller capacitance value; hence, the clock signal of the charge pump should be operated in a higher frequency to maintain the driving capability of the output terminal. In addition, the built-in capacitor may always be accompanied by larger parasitic capacitors, and the excessively high frequency of the clock signal may cause that there is too much power consumed by the parasitic capacitors. Especially when the load is light, the excessively high frequency may result in an extremely low operating efficiency. In such a condition, if the frequency of the clock signal is too high, the parasitic capacitors may consume too much power, and if the frequency of the clock signal is too low, the driving capability of the output terminal may not be enough to immediately react to load variations.
The prior art provides a method of switching the frequency of the clock signal, wherein the clock signal may be switched to a first frequency having a higher value or a second frequency having a lower value. The system may detect the output voltage of the charge pump, and the second frequency is applied when the output voltage is higher than a threshold value and the first frequency is applied when the output voltage is lower than the threshold value. However, according to the above method, the operating frequency is switched between several fixed frequencies. These fixed frequencies cannot be adapted to any loading situations. For example, a loading may preferably be driven by an operating frequency between the first frequency and the second frequency; that is, the first frequency is too high and the second frequency is too low. In such a situation, the output voltage may fluctuate around the threshold value, and the operating frequency may be continuously switched between the first frequency and the second frequency, resulting in poor system stability. Moreover, the frequency is switched after a variation on the output voltage is detected, such that the output voltage inevitably possesses a certain level of fluctuation. If the load varies significantly, it is hard to maintain a stable output voltage. In such a condition, the prior art is only applicable to a circuit system having capacitive loads only, and cannot be applied to a circuit system having a larger resistive load. This is because the resistive load has a larger variation, which easily causes the output voltage instable.
Thus, there is a need to provide another method of adjusting the frequency of the clock signal, in order to control the charge pump to be operated in an optimal frequency and also prevent the above weak points.